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RT8299 1 ds8299-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. ordering information note : richtek products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. 3a, 24v, 500khz synchronous step-down converter general description the RT8299 is a high efficiency, monolithic synchronous step-down dc/dc converter with internal power mosfets. it achieves 3a of continuous output current over a wide input supply range from 3v to 24v with excellent load and line regulation. current mode operation provides fast transient response and eases loop stabilization. cycle- by-cycle current limit provides protection against shorted outputs and soft-start eliminates input current surge during start-up. thermal shutdown provides reliable, fault tolerant operation. the low current shutdown mode provides output disconnection, enabling easy power management in battery powered systems. applications z industrial and commercial low power systems z computer peripherals z lcd monitors and tvs z green electronics/appliances z point of load regulation for high performance dsps, fpgas, and asics pin configurations (top view) sop-8 (exposed pad) features z z z z z 3v to 24v input voltage range z z z z z 3a output current z z z z z internal n-mosfets z z z z z current mode control z z z z z fixed frequency operation : 500khz z z z z z output adjustable from 0.8v to 15v z z z z z up to 95% efficiency z z z z z stable with low esr ceramic output capacitors z z z z z cycle-by-cycle over current protection z z z z z input under voltage lockout z z z z z output under voltage protection z z z z z thermal shutdown protection z z z z z sop-8 (exposed pad) and 10-lead wdfn packages z z z z z rohs compliant and halogen free boot vin sw gnd vcc pgood fb en gnd 2 3 4 5 6 7 8 9 fb pgood boot vcc gnd sw sw vin vin en 9 8 7 1 2 3 4 5 10 6 gnd 11 wdfn-10l 3x3 RT8299 package type sp : sop-8 (exposed pad-option 1) qw: wdfn-10l 3x3 (w-type) lead plating system g : green (halogen free and pb free) z : eco (ecological element with halogen free and pb free)
RT8299 2 ds8299-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. typical application circuit RT8299zqw 56 : product number ymdnn : date code 56 ym dnn RT8299 vin c in v in en pgodd sw boot c boot l1 v out c out r2 chip enable vcc gnd r t r1 fb power good c vcc 10f x 2 v out (v) r1 (k ) r2 (k ) r t (k ) l ( h) c out ( f) 1.2 15 30 50 2 22 x 2 2.5 25.5 12 40 3.6 22 x 2 3.3 16 5.1 30 4.7 22 x 2 5 27 5.1 18 6.8 22 x 2 table 1. recommended component selection marking information RT8299 gspymdnn RT8299zsp RT8299zsp : product number ymdnn : date code RT8299gsp RT8299gsp : product number ymdnn : date code RT8299gqw 56= : product number ymdnn : date code RT8299 zspymdnn 56=ym dnn
RT8299 3 ds8299-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. function block diagram functional pin description pin no. sop-8 (exposed pad) wdfn-10l 3x3 pin name pin function 1 5 boot bootstrap for high side gate driver. connect a 0.1 f or greater ceramic capacitor from boot to sw pin. 2 6, 7 vin supply input voltage. must bypass with a suitably large ceramic capacitor. 3 8, 9 sw switch node. connect to external lc filter. 4, 9 (exposed pad) 10, 11 (exposed pad) gnd ground. the exposed pad must be soldered to a large pcb and connected to gnd for maximum power dissipation. 5 1 fb feedback input. this pin is connected to the converter output. it is used to regulate the output of the converter to a desired value via an internal resistive voltage divider. for an adjustable output, an external resistive voltage divider is connected to this pin. 6 3 en enable input. a logic high enables the converter; a logic low forces the RT8299 into shutdown mode, reducing the supply current to less than 3 a. attach this pin to vin with a 100k pull up resistor for automatic startup. 7 2 pgood power good output. the output of this pin is open drain. 8 4 vcc bias supply. driver - + current sense amplifier pwm comparator oscillator 500khz ramp generator regulator + - error amplifier sw boot fb en vin + - gnd vcc 1pf 30pf 300k oc limit clamp reference pgood generator pgood s q r q + - 2v 3v 5k comparator
RT8299 4 ds8299-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. electrical characteristics (v in = 12v, t a = 25 c, unless otherwise specified) absolute maximum ratings (note 1) z supply input voltage, v in ----------------------------------------------------------------------------------- ? 0.3 to 26v z switching voltage, sw ------------------------------------------------------------------------------------- ? 0.3 to (v in + 0.3v) z boot voltage, boot ----------------------------------------------------------------------------------------- (v sw ? 0.3v) to (v sw + 6v) z all other pins ------------------------------------------------------------------------------------------------- ? 0.3 to 6v z power dissipation, p d @ t a = 25 c sop-8 (exposed pad) -------------------------------------------------------------------------------------- 1.333w wdfn-10l 3x3 ------------------------------------------------------------------------------------------------ 1.429w z package thermal resistance (note 2) sop-8 (exposed pad), ja --------------------------------------------------------------------------------- 75 c/w sop-8 (exposed pad), jc -------------------------------------------------------------------------------- 15 c/w wdfn-10l 3x3, ja ------------------------------------------------------------------------------------------ 70 c/w wdfn-10l 3x3, jc ------------------------------------------------------------------------------------------ 8.2 c/w z lead temperature (soldering, 10 sec.) ------------------------------------------------------------------ 260 c z junction te mperature --------------------------------------------------------------------------------------- 150 c z storage temperature range ------------------------------------------------------------------------------- ? 65 c to 150 c z esd susceptibility (note 3) hbm (human body model) --------------------------------------------------------------------------------- 2kv mm (ma chine model) ---------------------------------------------------------------------------------------- 200v recommended operating conditions (note 4) z supply voltage, v in ------------------------------------------------------------------------------------------- 3v to 24v z junction temperature range -------------------------------------------------------------------------------- ? 40 c to 125 c z ambient temperature range -------------------------------------------------------------------------------- ? 40 c to 85 c parameter symbol test conditions min typ max unit shutdown current i shdn v en = 0v -- -- 3 a supply current v en = 3v, v fb = 1v -- 1 -- ma upper switch on resistance -- 100 -- m lower switch on resistance -- 100 -- m switch leakage v en = 0v, v sw = 0v or 12v -- 0 10 a current limit i lim v boot ? v sw = 4.8v -- 5.5 -- a oscillator frequency f osc v fb = 0.75v 425 500 575 khz short circuit frequency v fb = 0v -- 150 -- khz maximum duty cycle d max v fb = 0.8v -- 93 -- % minimum on-time t on -- 100 -- ns feedback voltage v fb 4.5v v in 24v 788 800 812 mv logic-high v ih 2 -- 5.5 en input threshold voltage logic-low v il -- -- 0.4 v under voltage lockout threshold v uvlo v in rising -- 2.8 -- v under voltage lockout threshold hysteresis v uvlo -- 300 -- mv
RT8299 5 ds8299-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. parameter symbol test conditions min typ max unit vout rising, with respect to v fb -- 90 -- power good threshold vout falling, with respect to v fb -- 70 -- % vcc regulator -- 5 -- v vcc load regulation i cc = 5ma -- 5 -- % soft-start period t ss -- 2 -- ms thermal shutdown t sd -- 150 -- c note 1. stresses beyond those listed ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions may affect device reliability. note 2. ja is measured at t a = 25 c on a high effective thermal conductivity four-layer test board per jedec 51-7. jc is measured at the exposed pad of the package. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions.
RT8299 6 ds8299-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. typical operating characteristics reference voltage vs. temperature 0.780 0.785 0.790 0.795 0.800 0.805 0.810 0.815 0.820 -50 -25 0 25 50 75 100 125 temperature (c) reference voltage (v) v in = 12v, v out = 3.3v frequency vs. input voltage 470 480 490 500 510 520 530 540 550 560 570 3 5 7 9 11 13 15 17 19 21 23 input voltage (v) frequency (khz) 1 v out = 1.2v, i out = 0.5a efficiency vs. output current 0 10 20 30 40 50 60 70 80 90 100 00.511.522.53 output current (a) efficiency (%) v in = 5v, v out = 3.3v v in = 12v, v out = 3.3v v in = 23v, v out = 3.3v v in = 5v, v out = 1.2v v in = 3v, v out = 1.2v v in = 12v, v out = 1.2v reference voltage vs. input voltage 0.780 0.785 0.790 0.795 0.800 0.805 0.810 0.815 0.820 4 6 8 10 12 14 16 18 20 22 24 input voltage (v) reference voltage (v) v out = 3.3v, i out = 0a output voltage vs. output current 1.200 1.205 1.210 1.215 1.220 1.225 1.230 1.235 1.240 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 output current (a) output voltage (v) v in = 3v v in = 5v v v in = 4.5v v in = 12v v out = 1.2v output voltage vs. output current 3.320 3.325 3.330 3.335 3.340 3.345 3.350 3.355 3.360 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 output current (a) output voltage (v) v in = 5v v in = 12v v in = 23v v out = 3.3v
RT8299 7 ds8299-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. switching time (1 s/div) v in = 12v, v out = 1.2v, i out = 1.5a i l (2a/div) v out (5mv/div) v sw (10v/div) switching time (1 s/div) v in = 12v, v out = 1.2v, i out = 3a i l (2a/div) v out (5mv/div) v sw (10v/div) v in = 12v, v out = 1.2v, i out = 1.5a to 3a load transient response time (100 s/div) v out (100mv/div) i out (2a/div) current limit vs. temperature 2 3 4 5 6 7 8 -50 -25 0 25 50 75 100 125 temperature (c) current limit (a) v out = 1.2v v in = 12v v in = 5v v v in = 3v load transient response time (100 s/div) v out (100mv/div) i out (2a/div) v in = 12v, v out = 1.2v, i out = 0a to 3a frequency vs. temperature 470 480 490 500 510 520 530 540 550 560 570 -50 -25 0 25 50 75 100 125 temperature (c) frequency (khz) 1 v in = 23v v in = 12v v v in = 5v v in = 3v v out = 1.2v, i out = 0.5a
RT8299 8 ds8299-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. power off from v in time (2.5ms/div) v in = 12v, v out = 1.2v, i out = 3a i l (2a/div) v out (1v/div) v in (10v/div) power off from en time (2.5ms/div) v in = 12v, v out = 1.2v, i out = 3a i l (2a/div) v out (1v/div) v en (5v/div) power on from en time (2.5ms/div) v in = 12v, v out = 1.2v, i out = 3a i l (2a/div) v out (1v/div) v en (5v/div) power on from v in time (2.5ms/div) v in = 12v, v out =1.2v, i out = 3a i l (2a/div) v out (1v/div) v in (10v/div)
RT8299 9 ds8299-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. application information the RT8299 is a synchronous high voltage buck converter that can support the input voltage range fro m 3v to 24v and the output current can be up to 3a. output voltage setting the resistive divider allows the fb pin to sense the output voltage as shown in figure 1. figure 1. output voltage setting the output voltage is set by an external resistive voltage divider according to the following equation : ?? + ?? ?? out fb r1 v = v1 r2 where v fb is the feedback reference voltage (0.8v typ.). external bootstrap diode connect a 100nf low esr ceramic capacitor between the boot pin and sw pin. this capacitor provides the gate driver voltage for the high side mosfet. it is recommended to add an external bootstrap diode between an external 5v and boot pin for efficiency improvement when input voltage is lower than 5.5v or duty ratio is higher than 65% .the bootstrap diode can be a low cost one such as in4148 or bat54. the external 5v can be a 5v fixed input from system or a 5v output of the RT8299. note that the external boot voltage must be lower than 5.5v chip enable operation the en pin is the chip enable input. pulling the en pin low (<0.4v) will shutdown the device. during shutdown mode, the RT8299 quiescent current drops to lower than 3 a. driving the en pin high (>2v, < 5.5v) will turn on the device again. for external timing control (e.g.rc), the en pin can also be externally pulled high by adding a r en * resistor and c en * capacitor from the vin pin (see figure 5). an external mosfet can be added to implement digital control on the en pin when no system voltage above 2.5v is available, as shown in figure 3. in this case, a 100k pull-up resistor, r en , is connected between v in and the en pin. mosfet q1 will be under logic control to pull down the en pin. figure 3. enable control circuit for logic control with low voltage to prevent enabling circuit when v in is smaller than the v out target value, a resistive voltage divider can be placed between the input voltage and ground and connected to the en pin to adjust ic lockout threshold, as shown in figure 4. for example, if an 8v output voltage is regulated from a 12v input voltage, the resistor r en2 can be selected to set input lockout threshold larger than 8v. RT8299 gnd fb r1 r2 v out sw boot 5v RT8299 100nf figure 2. external bootstrap diode vin en gnd boot fb sw l r1 r2 v out chip enable v in RT8299 vcc c pgood c boot c out c in r en q1 100k v cc r 100k figure 4. the resistors can be selected to set ic lockout threshold vin en gnd boot fb sw l r1 r2 v out RT8299 vcc c pgood c boot c out c in r en 100k v cc r 100k 8v r en2 10f v in 12v
RT8299 10 ds8299-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. out out l in vv i = 1 fl v ??? ? ?? ??? ? ??? ? under voltage protection hiccup mode for the RT8299, it provides hiccup mode under voltage protection (uvp). when the fb voltage drops below half of the feedback reference voltage, v fb , the uvp function will be triggered and the RT8299 will shut down for a period of time and then recover automatically. the hiccup mode uvp can reduce input current in short-circuit condit ions. inductor selection the inductor value and operating frequency determine the ripple current according to a specific input and output voltage. the ripple current i l increases with higher v in and decreases with higher inductance. having a lower ripple current reduces not only the esr losses in the output capacitors but also the output voltage ripple. high frequency with small ripple current can achieve highest efficiency operation. however, it requires a large inductor to achieve this goal. for the ripple current selection, the val ue of i l = 0.24(i max ) will be a reasonable starting point. the large st ripple current occurs at the highest v in . to guarantee that the ripple current stays below the specified maximum, the inductor value should be chosen according to the following equation : out in rms out(max) in out v v i = i 1 vv ? c in and c out selection the input capacitance, c in, is needed to filter the trapezoidal current at the source of the high side mosfet. to prevent large ripple current, a low esr input capacitor sized for the maximum rms current should be used. the rms current is given by : out out l(max) in(max) vv l = 1 fi v ??? ? ? ??? ? ??? ? the inductor's current rating (caused a 40 c temperature rising from 25 c ambient) should be greater than the maximum load current and its saturation current should be greater than the short circuit peak current limit. please see table 2 for the inductor selection reference. this formula has a maximum at v in = 2v out , where i rms = i out / 2. this simple worst case condition is commonly used for design because even significant deviations do not offer much relief. choose a capacitor rated at a higher temperature than required. several capacitors may also be paralleled to meet size or height requirements in the design. for the input capacitor, two 10 f low esr ceramic capacitors are recommended. the selection of c out is determined by the required esr to minimize voltage ripple. moreover, the amount of bulk capacitance is also a key for c out selection to ensure that the control loop is stable. loop stability can be checked by viewing the load transient response as described in a later section. the output ripple, v out , is determined by : out l out 1 viesr 8fc ?? ?? + ?? ?? the output ripple will be highest at the maximum input voltage since i l increases with input voltage. multiple capacitors placed in parallel may be needed to meet the esr and rms current handling requirement. dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. special polymer capacitors offer very low esr value. however, it provides lower capacitance density than other types. although tantalum capacitors have the highest capacitance density, it is important to only use types that pass the surge test for use in switching power supplies. aluminum electrolytic capacitors have significantly higher esr. however, it can be used in cost-sensitive applications table 2. suggested inductors for typical application circuit component supplier series dimensions (mm) tdk vlf10045 10 x 9.7 x 4.5 tdk slf12565 12.5 x 12.5 x 6.5 taiyo yuden nr8040 8 x 8 x 4
RT8299 11 ds8299-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. for ripple current rating and long term reliability considerations. ceramic capacitors have excellent low esr characteristics but can have a high voltage coefficient and audible piezoelectric effects. the high q of ceramic capacitors with trace inductance can also lead to significant ringing. higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. their high ripple current, high voltage rating and low esr make them ideal for switching regulator applications. however, care must be taken when these capacitors are used at input and output. when a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, v in . at best, this ringing can couple to the output and be mistaken as loop instability. at worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at v in large enough to damage the part. checking transient response the regulator loop response can be checked by looking at the load transient response. switching regulators take several cycles to respond to a step in load current. when figure 5. reference circuit with snubber and enable timing control vin en gnd boot fb sw l r1 r2 v out 10f x 2 v in RT8299 vcc c pgood c boot c out c in r boot * r s * c s * r en * c en * * : optional v cc r 100k a load step occurs, v out immediately shifts by an amount equal to i load (esr) also begins to charge or discharge c out generating a feedback error signal for the regulator to return v out to its steady-state value. during this recovery time, v out can be monitored for overshoot or ringing that would indicate a stability problem. emi consideration since parasitic inductance and capacitance effects in pcb circuitry w ould cause a spike voltage on sw pin when high side mosfet is turned-on /off, this spike voltage on sw may impact on emi performance in the system. in order to enhance emi performance, there are two methods to suppress the spike voltage. one is to place an r-c snubber between sw and gnd and make them as close as possible to the sw pin (see figure 5). another method is adding a resistor r boot * in series with the bootstrap capacitor, c boot . but this method will decrease the driv ing capability to the high side mosfet. it is strongly recommended to reserve the r-c snubber during pcb layout for emi improvement. moreover, reducing the sw trace area and keeping the main power in a small loop will be helpful on emi performance. for detailed pcb layout guide, please refer to the section of layout consideration.
RT8299 12 ds8299-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. figure 6. derating curve of maximum power dissipation layout consideration follow the pcb layout guidelines for optimal performance of the RT8299. ` keep the traces of the main current paths as short and wide as possible. ` put the input capacitor as close as possible to the device pins (vin and gnd). ` sw node is with high frequency voltage swing and should be kept at small area. keep analog components away from the sw node to prevent stray capacitive noise pick- up. ` connect feedback network behind the output capacitors. keep the loop area small. place the feedback components near the RT8299. ` an example of pcb layout guide is shown in figure 6 for reference. thermal considerations for continuous operation, do not exceed the maximum operation junction temperature 125 c. the maximum power dissipation depends on the thermal resistance of ic package, pcb layout, the rate of surroundings airflow and temperature difference between junction to ambient. the maximum power dissipation can be calculated by following formula : p d(max) = (t j(max) ? t a ) / ja where t j(max) is the maximum operation junction temperature , t a is the ambient temperature and the ja is the junction to ambient thermal resistance. for recommended operating condition specifications, the maximum junction temperature is 125 c. the junction to ambient thermal resistance, ja , is layout dependent. for sop-8 (exposed pad) package, the thermal resistance, ja , is 75c/w on a standard jedec 51-7 four-layer thermal test board. for wdfn-10l 3x3 packages, the thermal resistance, ja , is 70 c/w on a standard jedec 51-7 four-layer thermal test board. the maximum power dissipation at t a = 25 c can be calculated by the following formulas : p d(max) = (125 c ? 25 c) / (75 c/w) = 1.333w for sop-8 (exposed pad) package p d(max) = (125 c ? 25 c) / (70 c/w) = 1.429w for wdfn-10l 3x3 package the maximum power dissipation depends on the operating ambient temperature for fixed t j(max) and thermal resistance, ja . the derating curve in figure 6 allow the designer to see the effect of rising ambient temperature on the maximum power dissipation. 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 0255075100125 ambient temperature (c) maximum power dissipation (w) 1 four-layer pcb sop-8 (exposed pad) wdfn-10l 3x3
RT8299 13 ds8299-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. figure 7. pcb layout guide v in v out gnd c in gnd sw v out c out r1 r2 input capacitor must be placed as close to the ic as possible. sw should be connect ed to inductor by wide and short trace. keep sensitive components away from this trace. the feedback components must be connected as close to the device as possible. boot vin sw gnd vcc pgood fb en gnd 2 3 4 5 6 7 8 9 c vcc r s * c s * gnd v in r en r pg v cc the c vcc component must be connected as close to the device as possible. the r en component must be connected to vin.
RT8299 14 ds8299-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. outline dimension a b j f h m c d i y x exposed thermal pad (bottom of package) 8-lead sop (exposed pad) plastic package dimensions in millimeters dimensions in inches symbol min max min max a 4.801 5.004 0.189 0.197 b 3.810 4.000 0.150 0.157 c 1.346 1.753 0.053 0.069 d 0.330 0.510 0.013 0.020 f 1.194 1.346 0.047 0.053 h 0.170 0.254 0.007 0.010 i 0.000 0.152 0.000 0.006 j 5.791 6.200 0.228 0.244 m 0.406 1.270 0.016 0.050 x 2.000 2.300 0.079 0.091 option 1 y 2.000 2.300 0.079 0.091 x 2.100 2.500 0.083 0.098 option 2 y 3.000 3.500 0.118 0.138
RT8299 15 ds8299-01 may 2012 www.richtek.com richtek technology corporation 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 richtek products are sold by description only. richtek reserves the right to change the circuitry and/or specifications without notice at any time. customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a richtek product. information furnish ed by richtek is believed to be accurate and reliable. however, no responsibility is assumed by richtek or its subsidiaries for its use; nor for any infringeme nts of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of r ichtek or its subsidiaries. dimensions in millimeters dimensions in inches symbol min max min max a 0.700 0.800 0.028 0.031 a1 0.000 0.050 0.000 0.002 a3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 d 2.950 3.050 0.116 0.120 d2 2.300 2.650 0.091 0.104 e 2.950 3.050 0.116 0.120 e2 1.500 1.750 0.059 0.069 e 0.500 0.020 l 0.350 0.450 0.014 0.018 w-type 10l dfn 3x3 package 1 1 2 2 note : the configuration of the pin #1 identifier is optional, but must be located within the zone indicated. det ail a pin #1 id and tie bar mark options d 1 e a3 a a1 d2 e2 l b e see detail a

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